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Reviews development and definition activities for multiple new and emerging technology product portfolios including determination of cost and impact, and continually reviews ROI of specific products. Working with multiple product management, engineering, program, marketing, and other business stakeholders executes the on the roadmap creating a strong business impact. Oversees successful cross-functional collaboration by ensuring the completion of milestones ensuring the completed work aligns with roadmap for a product line(s). Drives product line launch strategies for new products and technologies through technical marketing opportunities such as conferences, congresses, and direct customer contact and ensures successful product launch. Prepares and delivers highly complex and high-stakes technical and business presentations to variety of internal and external audiences regarding product roadmaps that explain and demonstrate products to customers and integrates customer feedback into project roadmaps. Communicates regularly with internal customers, third-party vendors, and senior management to establish needs and goals, and executes communication/change management plan for stakeholders, management, and executives. Bachelor's degree in Engineering, Information Systems, Computer Science, Humanities, or related field. 4+ years of Product Management or related work experience. 6+ years of product management experience. x86/Windows ecosystem. AI, Gen-AI technologies, developer tools, workflows, frameworks Embedded technologies - CPU/GPU/codecs or related software. Experience managing, influencing, negotiating with external partners such as Software developers, OS vendors, middleware/tools providers, OEMs, ODMs, OS vendors, benchmarking companies, open-source packages, and tech press. Experience working with operating budgets and/or project financials. Experience working in a large matrixed organization.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446696087701", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446696087834, "name": "ASICS Eng Staff", "location": "Austin, Texas, United States of America", "locations": ["Austin, Texas, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "60130 QCT DSP Core Implementation (Austin)", "t_update": 1702068923, "t_create": 1701820800, "ats_job_id": "3056418", "display_job_id": "3056418", "type": "ATS", "id_locale": "3056418-en", "job_description": "Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. 6+ years of ASIC design, verification, validation, integration, or related work experience. 2+ years of experience with architecture and design tools. 2+ years of experience with scripting tools and programming languages. 2+ years of experience with design verification methods. 1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director level and above). Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products. Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements. Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs. Evaluates all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages. Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects. 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We are looking for a leader that leads from the front. Bachelor's degree in technology or business or related field of study Thirteen (13) years in Enterprise Technology sales Six (6) years of leadership Seventeen (17) years of sales experience in selling end user compute technology Ten (10) years in an ascending technology sales leadership position Masters degree in business or technology preferred Enterprise account management expertise, the ability to manage change and the desire to operate effectively across organizations and customers Ability to successfully navigate inherent challenges/obstacles of new product adoption, and demonstrated experience in selling new or nascent technology/devices into large corporate enterprises Ability to communicate, educate and evangelize both internally & externally Excellent communication and interpersonal skills Creative problem solving with strong analytical skills Strong ability to navigate ambiguity A challenger mindset is a plus", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446696062010", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446696070054, "name": "SOC Physical Design Engineer", "location": "Santa Clara, California, United States of America", "locations": ["Santa Clara, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "50340 CNE SoC_HW_VLSI_SoC_Conn_SS USA_SCL", "t_update": 1702068904, "t_create": 1701734400, "ats_job_id": "3056290", "display_job_id": "3056290", "type": "ATS", "id_locale": "3056290-en", "job_description": "Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. 9+ years of ASIC design, verification, validation, integration, or related work experience. 3+ years of experience with architecture and design tools. 3+ years of experience with scripting tools and programming languages. 3+ years of experience with design verification methods. 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above). Physical Design: Leading and executing the physical design process of complex semiconductor chips, ensuring adherence to design specifications and requirements. Floorplanning: Creating chip floorplans considering various factors like power, performance, area, and routing congestion to optimize the layout. Timing Closure: Ensuring that the chip meets timing requirements by optimizing clock tree synthesis, placement, and routing. Place and Route: Overseeing the placement and routing of logic gates and interconnects, optimizing for performance, power, and area. Power Optimization: Implementing power-saving techniques and strategies to meet low-power design goals. Physical Verification: Conducting design rule checks (DRC) and layout versus schematic (LVS) checks , ERC and other miscellaneous checks to ensure the physical design meets manufacturing requirements. Power Integrity: Ensuring that the chip meets the strict constraints of IR drop, Electromigration, and ESD path resistance checks. Collaboration: Working closely with design teams, CAD engineers, and other cross-functional teams to achieve project goals and resolve design challenges. Methodology Development: Developing and improving physical design methodologies, flows, and tools to enhance efficiency and quality of chip designs. Team Leadership: Mentoring and guiding junior engineers, providing technical expertise and leadership within the physical design team.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446696070054", "isPrivate": false, "latlongs": "37.3541079,-121.9552356"}, {"id": 446696070264, "name": "DFT Engineer (Austin, TX)", "location": "Austin, Texas, United States of America", "locations": ["Austin, Texas, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "60130 QCT DSP Core Implementation (Austin)", "t_update": 1702068905, "t_create": 1701734400, "ats_job_id": "3056296", "display_job_id": "3056296", "type": "ATS", "id_locale": "3056296-en", "job_description": "Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field. This person will work closely with RTL, Synthesis and Physical Design teams through-out the project cycle. Minimum of 2 years of experience in DFT concepts Basic knowledge of ATPG with EDA Vendor compression architectures Basic concept of different fault models Hand-on experience on scan insertion, running ATPG and gate level simulations Must have hands-on experience in scripting languages such as TCL, Perl, etc. Preferrable experience with Siemens Tessent DFT solutions (e.g. EDT, iJTAG, SSN) and Synopsys FC tool Excellent communication skills and ability to collaborate", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446696070264", "isPrivate": false, "latlongs": "30.267153,-97.7430608"}, {"id": 446696061656, "name": "Engineering Technician", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "Engineering Technician", "business_unit": "05648 QCT Stargate R&D - San Diego", "t_update": 1702069137, "t_create": 1701648000, "ats_job_id": "3056236", "display_job_id": "3056236", "type": "ATS", "id_locale": "3056236-en", "job_description": "Manages, sets up, and maintains benches, testers, and other equipment. Responsible for installing, upgrading, configuring, and optimizing utilization of equipment and components. Performs measurements and executes test plans, as well as failure analysis and debugging of issues. Responsible for upkeeping and implementing housekeeping and safety standards in the workplace. Helps set up and maintain benches, testers, and other equipment. Installs, upgrades, and configures equipment and components, with supervision. Performs basic measurements following SOP and contributes to documentation. Monitors equipment performance identifies failures or malfunctions and escalates appropriately. Helps conduct basic troubleshooting and perform basic repair work, rework, removal, and adjustments to equipment as necessary, with direction. Helps set up test equipment using hand tools or automatic test methods to perform routine tests of circuits, components, instruments and mechanical assemblies. Executes manual and automated test plans as defined and reproduces and debugs routine issues. Conducts basic analyses as directed to identify and escalate issues to leaders. Works with data and information from others to understand simple specifications and execute tasks. Collaborates with individuals inside own team and with other teams to complete the team's work. Works under close supervision. Decision-making is limited. Impact of decisions is readily apparent. Errors made typically only impact timeline (i.e., require additional time to correct). Requires verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area. Some tasks require multiple steps which must be performed in a specific order; directions or manuals can accurately document the steps necessary to perform the task. Some creativity may be required to troubleshoot technical problems or deal with novel circumstances. Limited problem solving required, generally in the nature of troubleshooting simple processes or technology. Has no influence over key organizational decisions. Does not have a role in strategic planning. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Pay range: $19.78 - $29.68 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. High School diploma or equivalent. Frequently transports and installs equipment up to 25 lbs. Associate's degree in Computer Science, Mathematics, Electrical Engineering, or related field. 1+ year of experience with general computer skills and Microsoft applications. 1+ year experience in Semiconductor or related industry.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446696061656", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446696060696, "name": "Senior Manager, Product Marketing - Mobile Compute", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "Product Marketing", "business_unit": "20586 Marketing: Product & Technology - Compute", "t_update": 1702069079, "t_create": 1701648000, "ats_job_id": "3056226", "display_job_id": "3056226", "type": "ATS", "id_locale": "3056226-en", "job_description": "Conducts competitive analysis and synthesizes market research; evaluates sales performance, formulates, and reviews corporate long-range plans, goals, objectives for specific product areas, monitors competitive activity, identify customer needs, make business decisions driven by strategy to influence key stakeholders across the organization. Determines opportunities for our product and supports the implementation of strategies for penetration into the market. Partner with competitive analysis and research team, product management, business development team and OEMs to develop proof points/facts/solutions marketing content and plans that are tailored to target audiences, to position and execute marketing plans in line with business goals Leverages expert knowledge of Product Marketing principles and best practices to identify, implement, and oversee products, projects, and programs. Develops and contributes to developing product messaging that articulates our technology value proposition or tailoring it to specific audiences or verticals, product positioning statements and competitive positioning. Development of targeted marketing content and initiatives including, contracting and managing appropriate agencies and managing budgets, and provides persuasive presentations to customers to implement product positioning strategies. Ensure measurement, KPI, and ROI goals are considered and implemented. Support regional teams working to help provide product positioning materials and training, influence ecosystem partners and channel to facilitate business growth. Bachelor's degree and 4+ years of Product Marketing, Marketing, Business, Engineering, Communications, or related work experience. OR Associate's degree or equivalent degree and 6+ years of Product Marketing, Marketing, Business, Engineering, Communications, or related work experience. OR High school Diploma or equivalent and 8+ years of Product Marketing, Marketing, Business, Engineering, Communications, or related work experience. Bachelor's Degree in Business Administration/Management, Engineering, Marketing, Technical or related field. Master's Degree in Business Administration/Management, Engineering, Marketing, Technical or related field. 8+ years of Product Marketing or related work experience. 4+ years of leading strategic or business performance initiatives and/or organizational change initiatives. 3+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above) 3+ years of experience working in a large matrixed organization. 1+ years in a leadership role with direct reports. Excellent written and oral communication skills with ability to work with a dynamic team environment. Effective relationship building and influencing skills. Excellent planning and organizational skills. Ability to work and lead in a highly collaborative team environment, building alignment and - consensus across product management, business development and senior management Broad experience in producing high impact business-to-business marketing communications, including conferences/trade shows, channel programs, digital marketing and social media Experienced in collaborating across functional teams to execute integrated marketing programs Self-starter, must be resourceful, and able to effectively operate in a complex, fast-paced environment", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446696060696", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446696061912, "name": "Processor Design Verification Engineer", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "50260 QCT DSP Core Design (SD)", "t_update": 1702068980, "t_create": 1701648000, "ats_job_id": "3056227", "display_job_id": "3056227", "type": "ATS", "id_locale": "3056227-en", "job_description": "Evaluates all aspects of the design process from instruction set architecture to implementation. Assists with development of small, well-defined blocks, features, and/or tests that achieve desired quality, functionality, power, performance, and timing standards under supervision. Identifies basic architecture and design problems and brings them to the attention of project leads; collaborates and collects feedback during design reviews to ensure the block meets the requirements. Seeks basic knowledge of industry trends, competitors' products, and advances in various engineering fields related to DSP products and technology (e.g., machine learning, modem); requires minimal consultation with more experienced engineers to understand and apply advanced concepts. Communicates effectively with supervision, peers, and leads using written, verbally, and online communication; effectively tracks and documents issues, features, and design changes. Works under close supervision. Impact of decisions is readily apparent. Errors made typically only impact timeline (i.e., require additional time to correct). Requires verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area. Works within the prescribed budgetary objectives of the department. Erroneous decisions, failure to achieve results may cause delays in schedules and result in the re-allocation of some resources. All tasks are simple in nature, consisting of limited number of steps and can easily be referenced using directions or manuals. Some creativity may be required to troubleshoot technical problems or deal with novel circumstances. Limited problem solving required, generally in the nature of troubleshooting simple processes or technology. Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field. 2+ years of experience with high-performance microprocessor design. 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2, "-6.2087634,106.845599": 1, "19.0759837,72.8776559": 1, "33.4255104,-111.9400054": 1, "36.1699412,-115.1398296": 1, "37.09024,-95.712891": 1, "38.9071923,-77.0368707": 1, "40.7127753,-74.0059728": 1, "42.0778065,-87.8223368": 1, "42.3600825,-71.0588801": 1, "44.837789,-0.57918": 1, "45.5201336,-122.9898149": 1, "48.856614,2.3522219": 1, "49.2827291,-123.1207375": 1, "49.4521018,11.0766654": 1, "50.1336435,8.522376": 1, "51.165691,10.451526": 1, "51.2868939,-0.7526149999999999": 1, "52.52000659999999,13.404954": 1, "53.41291,-8.24389": 1, "55.378051,-3.435973": 1, "57.70887,11.97456": 1}}, "isSubQuery": false, "showBusinessUnitInPositionSidebar": false, "hideDepartment": null, "iframeImplementation": null, "pcsTextConfiguration": {}, "facetNoTitlecase": null, "skipCSSFacetCapitalization": false, "enableMapClustering": false, "readmoreInstructionEnabled": false, "candidateLogin": {}, "isHomePageLoad": true, "candidateBuildProfile": {}, "chatbot": false, "copilotConfig": {"enabled": false}, "enabledPersonalizedFeatures": {"recommendationFeedback": false, "tldr": true, "personalizationPreferences": false}, "installed_app_data": [], "enhancementsEnabled": false, "disableAutoScrollOnPositionSelect": false, "locationDistanceKmDefault": 100, "searchFiltersTranslationWhitelist": [], "customJobDescTranslationSkipList": [], "hamburgerMenuEnabled": false, "enableCandidateReferralFlow": false, "showBanner": false, "pcsBannerMessage": null, "locationRadiusConfig": {"showLocationRadius": false, "locationRadiusType": "km"}, "pcsApplyFormRouteEnabled": false, "isPcsBrandingApril2023Enabled": false, "allowedFileTypes": {}, "pcsOctupleMigration0Enabled": false, "pcsOctupleMigration1Enabled": false, "replaceUrlOnGoBack": true, "pcsRedesignedNuxEnabled": true, "userActivityTimeout": 86400000, "userActivityTimeoutEnabled": 1, "isLoggedInPcsEnabled": false, "sortByConfig": null, "searchBoxConfig": {}, "excludePrivatePositions": true, "eeocFilterKeywords": ["veteran", "disability", "gender", "race", "citizen", "visa", "ethnicity"], "disableScrollLoadPositionSidebar": false, "locationFlexibilityFrontendEnabled": false, "workLocationOptionFrontendEnabled": false, "loggedOutNotificationsEnabled": false, "prepopulateApplyFormEnabled": false, "prepopulateSettings": {"prepopulateCheckboxText": "Save my answers for future applications", "showPrepopulateCheckbox": false}, "themeBuilderUser": null, "mandatoryFields": ["firstname", "lastname", "email", "phone"], "t3sEnabled": false, "applyFormV2Enabled": false, "loggedOutSavedSearchEnabled": false, "locationRadiusTypeToggleEnabled": false, "incompleteApplicationsEnabled": false, "incompleteApplicationConfig": {}, "fallbackPcsJdGate": false, "pcsBlindfoldLinkoffGate": false, "enableResumeCoach": false, "jobcartMultiApplicationModeGate": false, "isPcsEnabled": true, "phoneWithCountryCodeEnabled": true, "notificationSuggestVerificationToken": null, "cookiesAutoDisabled": false, "strictEmailValidationEnabled": true, "chatbotxConfig": {}, "pcsAccessibilityHomeEnabled": true, "pcsAccessibilityApplyFormEnabled": true, "showLanguageDropdown": true, "languages": [{"value": "en", "title": "English"}, {"value": "de", "title": "Deutsch"}, {"value": "zh-CN", "title": "\u4e2d\u6587 (\u7b80\u4f53)"}], "displayLanguage": "en", "requestLocation": false, "positionQnAEnabled": false, "singlePageCareersNavbarGate": false, "advancedOptionsA11yGate": false, "positionSidebarScrollResetGate": false}
@media screen and (min-width: 1500px) {
.hero-image {
height: 110vh !important;
margin-left: auto;
margin-right: auto;
}
}
@media screen and (max-width: 1500px) {
.hero-image {
height: 120vh !important;
margin-left: auto;
margin-right: auto;
}
}
.hero-image {
background-size: contain !important;
font-weight: bold;
padding: 50px;
position: relative;
text-align: center;
width: 100%;
height: 100%;
}
.faq-custom-header {
float: right;
margin-right: 310px;
margin-top: 30px;
z-index: 9999999;
position: relative;
color: rgb(74, 90, 117) !important;
font-size: 20px !important;
}
@media screen and (max-width: 420px) and (min-width:281px){
.faq-custom-header {
margin-top: 0px;
top:30px;
right: 25px;
margin-right: 0px;
}
.faq-custom-header.benefits {
margin-right: -42px !important;
margin-top: -30px;
}
.faq-custom-header.search-for-jobs {
margin-right: -42px !important;
margin-top: 30px;
}
}
@media screen and (max-width: 820px) and (min-width:421px) {
.faq-custom-header {
margin-top: 0px;
top:58px;
}
.faq-custom-header.benefits {
margin-right: 15px !important;
}
.faq-custom-header.search-for-jobs {
margin-right: 15px !important;
}
}
@media screen and (max-width: 280px) {
.faq-custom-header {
margin-top: 0px;
top:90px;
margin-right: 245px;
}
}
.success-form .checkmark .fa-check {
color:#3253dc !important;
font-size: 100px !important;
}
.success-form .browse-more .btn {
background-color: #fff;
border: 1px solid #3253dc !important;
color: #3253dc !important;
font-size: 14px;
font-weight: 600 !important;
line-height: 18px;
min-width: 145px;
text-align: center;
}
.upload-resume-modal .dropzone-container .btn {
background-color: #3253dc !important;
}
.upload-resume-modal .privacy-agreement .action-buttons .btn-sm {
border: 1px solid #3253dc !important;
}
.btn-primary, .btn-primary:hover, .btn-primary:focus, .btn-primary:active, .btn-primary.active, .open .dropdown-toggle.btn-primary, .btn-primary:active:focus, .btn-primary:active:hover, .btn-primary.active:hover, .btn-primary.active:focus {
color: #fff !important;
background-color: #3253dc !important;
}
.resume-name {
color: #3253dc;
}
.apply-form .position-apply-cancel-button {
border: 1px solid #3253dc !important;
color: #3253dc !important;
}
.apply-form .btn-primary {
background: #3253dc !important;
border-color: #3253dc !important;
}
.go-button {
border: 1px solid #3253dc;
color: #3253dc;
}
.btn-secondary, .btn-secondary:hover, .btn-secondary:focus, .btn-secondary:active, .btn-secondary.active, .open .dropdown-toggle.btn-secondary, .btn-secondary:active:focus, .btn-secondary:active:hover, .btn-secondary.active:hover, .btn-secondary.active:focus {
color: #3253dc !important;
border-color: #3253dc !important;
}
.add-to-job-cart-button {
border: 1px solid #3253dc !important;
color: #3253dc !important;
}
.position-card .position-title {
color: #3253dc;
}
.search-results-main-container .position-cards-container .card-selected {
border-left: 8px solid #3253dc;
}
.profile-dropdown .dropdown-title {
color: #3253dc !important;
}
.advanced-options-button {
color: #3253dc !important;
}
.fa-share {
color: #3253dc !important;
}
.position-facets .pillTitle {
color: #3253dc !important;
}
.perk .perk-icon {
color: #3253dc !important;
}
.join-tn-link {
position: relative;
top: 10px;
color: rgb(74, 90, 117) !important;
font-size: 20px !important;
}
.jobs-custom-header {
float: right;
margin-right: -190px;
margin-top: 30px;
z-index: 9999999;
position: relative;
color: rgb(74, 90, 117) !important;
font-size: 20px !important;
}
.ef-dropdown.language-dropdown .ef-dropdown-title {
color: rgb(74, 90, 117) !important;
font-size: 20px !important;
}
.upload-resume-modal .privacy-agreement .action-buttons .btn-sm.btn-secondary.pointer{
color: #3253dc !important;
}
.faq-custom-header.benefits {
margin-right: 20px;
}
.faq-custom-header.search-for-jobs{
margin-right: 20px;
}
.col-md-12.all-positions-header.col-sm-12.col-xs-12:after {
content: "Prior to uploading your resume, please ensure your location is included.";
}