Qualcomm Careers | Engineering Jobs and More

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Wir rekrutieren kluge K\u00f6pfe und setzen uns f\u00fcr eine Kultur der gegenseitigen Unterst\u00fctzung und Inklusion ein. So k\u00f6nnen mit Ihren Ideen zu weltver\u00e4ndernden Innovationen und bahnbrechenden Technologien beitragen. Damit das m\u00f6glich ist, nutzen wir die ganze Breite und Tiefe unseres weltweiten Know-hows. Wir liefern Antworten, machen Komplexes einfach und \u00fcberwinden gemeinsam anspruchsvollste Herausforderungen.</p> <p><strong>Innovationen mit Technologieexperten<br /></strong>Karriere kennt keine Grenzen \u2013 davon sind wir bei Qualcomm fest \u00fcberzeugt. Nutzen Sie die einzigartige M\u00f6glichkeit, mit hoch angesehenen und f\u00fchrenden Engineering- und Technologieexperten der Branche zusammenzuarbeiten. Bei uns erleben Sie Lernen und berufliche Weiterentwicklung in einer v\u00f6llig neuen Dimension.</p> <p><strong>Gesund leben, gesund arbeiten<br /></strong>Dar\u00fcber hinaus haben Sie Zugang zu Programmen wie unseren kontinuierlichen Lern- und Weiterentwicklungsprogrammen, der Erstattung von Studiengeb\u00fchren und Mentoring, um Ihr grenzenloses Potenzial auszusch\u00f6pfen \u2013 au\u00dferdem haben Sie die M\u00f6glichkeit, Ihre Lebensqualit\u00e4t durch unsere umfassenden, erstklassigen Leistungsangebote zu verbessern .</p> <p>Die Arbeit, die wir bei Qualcomm leisten, hat Auswirkungen auf das Leben rund um den Globus \u2013 und Sie k\u00f6nnen ein Teil davon sein. Bewerben Sie sich noch heute und entfalten Sie Ihr volles Potenzial..</p>"}}}, "customContent": {"positionSections": [{"title": "Unlock Your Limitless Potential with Qualcomm", "body": "<p>Whether you&rsquo;re launching a new career or ready to explore what&rsquo;s next in the evolution of your talent and expertise, you&rsquo;re about to embark on a career growth journey like no other.</p> <p><strong>Bring out your best, with the best<br /></strong>Our employees make Qualcomm&rsquo;s success possible. We hire the brightest minds and foster a supportive, inclusive culture where your ideas have the power to contribute to world-changing innovations and breakthrough technologies. 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Learn more about how our culture of collaboration and robust benefits program allow our employees to live well and exceed their potential.", "recaptcha_enabled": 1, "companyName": "Qualcomm", "showLoggedOutNotificationsPrivacyPolicy": false}, "positions": [{"id": 446694490442, "name": "Wireless Systems Engineering Internship - Summer 2024", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America", "Boulder, Colorado, United States of America", "Santa Clara, California, United States of America", "Boxborough, Massachusetts, United States of America", "Bridgewater, New Jersey, United States of America"], "hot": 0, "department": "Interim Engineering Intern - Systems", "business_unit": "02410 QCT Engineering Mgmt - Intern", "t_update": 1701390823, "t_create": 1694044800, "ats_job_id": "3053320", "display_job_id": "3053320", "type": "ATS", "id_locale": "3053320-en", "job_description": "Company: Qualcomm Technologies, Inc. Job Area: Interns Group, Interns Group > Interim Engineering Intern - Systems General Summary: Before there were smartphones or smart cities, before autonomous cars or 360 virtual reality videos, there was our technology. Headquartered in San Diego, for over 30 years Qualcomm's inventions have inspired others to make the impossible, possible. From 5G to artificial intelligence, IoT to automotive and extended reality applications, Qualcomm is inventing the technologies of an intelligently connected future, spearheading research efforts for the next global wireless standard, and collaborating with industry leaders in the wireless value chain to make this future a commercial reality. You're bringing skills. We'll provide the environment and the experience to push your limitless potential. Join us for our U.S. 2024 summer intern program! Over the last few decades the Wireless Research and Development (WRD) and Modem Systems groups at Qualcomm have been the instrumental driving force behind the mobile communications revolution, having touched every aspect of our modern day life. From the early days of CDMA to 3G UMTS, 4G LTE, LTE Advanced, and now onto 5G NR and wireless Machine Learning and beyond, both groups have been key players in moving these technologies from concept to lab to actual mass scale real life deployments. As a Qualcomm Wireless Systems Engineering intern you have the opportunity to push the boundaries of what exists and establish the new standards for tomorrow. You will work as an equal contributor on a team of leading engineers to innovate on CDMA Application Specific Integrated Circuits (ASICs) and architect, analyze and simulate cutting-edge, next-generation wireless networks. Minimum Qualifications Currently enrolled in a master's, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field Must be available for 11 - 14 weeks during Summer 2024 (May-September) with a graduation date of December 2024 or later Successful candidates will have experience in one or more of the following Wireless Systems Engineering technical tracks: Wireless Communication Communication theory, Stochastic Processes, Linear Algebra, signal processing, information theory, channel coding, probability and random processes, applied mathematics, RF interfaces and digital mitigation of RF distortion, Bayesian inference or upper layer protocol design experience including 3GPP IMS, NAS, MAC/RLC/PDCP and RRC, IP, UDP, TCP, HTTP, routing etc. Experience with machine learning and key machine learning tools/libraries (TensorFLow, PyTorch, Keras etc), neural networks architectures and building models Experience with wireless standards (i.e. LTE/WiFi/5G/UMTS) Knowledge and/or experience in MIMO, OFDM, CDMA PHY/MAC layer systems design for 5G (sub-6 and mmW), spectrum sharing, and next generation WiFi Modem architecture, software engineering and simulation design, microprocessor architecture, embedded software, data network protocols knowledge Ability to program effectively in C/C++, Python and/or Matlab. Systems design for M2M, cellular V2X communication, and industrial IOT Strong analytical and problem-solving skills RF System Design Solid Knowledge in RF and microwave theory Antenna theory Analog IC Design linear systems & Filter Design Digital Pre-Distortion System Integration & Test (SIT) Test Automation framework design and development using Python Experience w/cellular systems, voice/data, test equipment/tools systems performance analysis Understand existing internal automation frameworks for performance, power and thermal analysis Communication system knowledge (physical, upper layers) Application layer protocols (TCP/IP, UDP, ICMP) Qualcomm's Internship Program Our interns join world-class teams to help define and build what is next for mobility and the world. You'll be paired with a mentor with visibility to your project and team, receive support from your manager, and have access to the entire Qualcomm employee community to ensure your success. To round out your summer internship, we host professional development workshops, social events, cross-functional speaker sessions, and an executive speaker series. In addition to competitive hourly pay and accrued vacation time, you will receive relocation coverage and furnished housing accommodations for the duration of your internship. By applying here, you are expressing interest in one of our many 2024 Qualcomm Wireless Systems Engineering internships. It's important to note that this is not a job posting for a specific role. We will review resumes on an ongoing basis, and a recruiter may reach out to you. Applicants: If you are an individual with a disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found here for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm is an equal opportunity employer and supports workforce diversity. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range: $0.00 - $0.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer! If you would like more information about this role, please contact Qualcomm Careers.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446694490442", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446694490443, "name": "Hardware (Digital Design, DV, CPU, GPU) Engineering Internship \u2013 Summer 2024", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America", "Santa Clara, California, United States of America", "Boxborough, Massachusetts, United States of America", "Austin, Texas, United States of America", "Bridgewater, New Jersey, United States of America"], "hot": 0, "department": "Interim Engineering Intern - HW", "business_unit": "02410 QCT Engineering Mgmt - Intern", "t_update": 1701390527, "t_create": 1694044800, "ats_job_id": "3053319", "display_job_id": "3053319", "type": "ATS", "id_locale": "3053319-en", "job_description": "Company: Qualcomm Technologies, Inc. Job Area: Interns Group, Interns Group > Interim Engineering Intern - HW General Summary: Before there were smartphones or smart cities, before autonomous cars or 360\u00b0 virtual reality videos, there was our technology. Headquartered in San Diego, for over 30 years Qualcomm inventions have inspired others to make the impossible, possible. From 5G to artificial intelligence, from IoT to automotive and extended reality applications, Qualcomm is inventing the technologies of an intelligently connected future, spearheading research efforts for the next global wireless standard, and collaborating with industry leaders in the wireless value chain to make this future a commercial reality. You're bringing skills. We'll provide the environment and the experience to push your limitless potential. Join us for our U.S. 2024 summer intern program! As a Qualcomm Hardware Engineering Intern, you'll have the opportunity to push the boundaries of what exists and help establish the new standards for tomorrow. You will leverage your electrical and/or computer engineering degree to work on one of the following Qualcomm multi-disciplinary teams: System (architecture, modeling), Front-end Design (micro-architecture, modeling, RTL), Implementation (synthesis & timing constraints), Design-for-Test (DFT), Physical Design (Place & route, CTS, timing closure), Pre-silicon Verification (DV), Emulation, Post-silicon Validation (VI), CAD, GPU Design, and Machine Learning. Minimum Qualifications Currently enrolled in a bachelor's, master's, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field Must be available for 11 - 14 weeks during Summer 2024 (May-September) with a graduation date of December 2024 or later Successful candidates will have experience in one or more of the following Hardware technical tracks: Digital Design/DV (Wireless) \u200bRTL development for modem physical and MAC layer processing Development of verification components using System Verilog and UVM Participating in model cellular modem datapaths for bit exact correctness and verification of wireless modem Digital design fundamentals and digital signal processing Wireless communication, digital communication, communication theory Cellular (LTE, 5G) and WiFi (802.11 be) C, Perl, Verilog, System Verilog, C++, Matlab GPU (Multimedia) Engineering design and development in MSM SOC (Mobile Station Modem System on chips) and Chipset Architecture ASIC implementation of Image processing Camera IP GPU pipeline validation (stimulus generators, checkers, monitors, drivers and models for power/performance) Graphics power analysis & optimization (Vulkan) C, Perl, Verilog, System Verilog, C++, Python CPU Validation of concepts and high-level system requirements related to CPU and SOC level micro-architecture Develop detailed test and coverage plans based on the architecture and micro-architecture Develop verification methodology, ensuring scalable and portable environment Develop verification plans and test benches Execute verification plans, including design bring-up, DV environment bring-up, regression enabling for all features, debug of the test failures Verification methodologies and tools such as simulators, coverage collection, gate level simulation, waveform viewers C, C++, Python MIXED-SIGNAL Mixed signal IP and high speed interface (ADC/DAC, PLL, Sensor, Serdes, DDR, etc.) architecture definition, design, implementation (using standard ASIC flow), and SoC integration RTL coding, lint checks, CDC checks, DFT updates, formal equivalency checks, and ECO implementation Static timing analysis and optimization of high-speed critical paths and complex mixed-signal IPs Cadence Design Environment Low power analog/digital design Perl, Verilog, Shell, Python, Tcl, SystemVerilog Qualcomm's Internship Program Our interns join world-class teams to help define and build what is next for mobility and the world. You'll be paired with a mentor with visibility to your project and team, receive support from your manager, and have access to the entire Qualcomm employee community to ensure your success. To round out your summer internship, we host professional development workshops, social events, cross-functional speaker sessions, and an executive speaker series. In addition to competitive hourly pay and accrued vacation time, you will receive relocation coverage and furnished housing accommodations for the duration of your internship. When applying, you can specify which technical track(s) you would like to be considered for. By applying here, you are expressing interest in one of our many 2024 Qualcomm Hardware Engineering internships. It is important to note that this is not a job posting for a specific role. We will review resumes on an ongoing basis, and a recruiter may reach out to you. Applicants: If you are an individual with a disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found here for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm is an equal opportunity employer and supports workforce diversity. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range: $0.00 - $0.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer! If you would like more information about this role, please contact Qualcomm Careers.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446694490443", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695989699, "name": "SoC Power Design Engineer", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "03959 QCT Power - SD", "t_update": 1701392128, "t_create": 1701129600, "ats_job_id": "3056023", "display_job_id": "3056023", "type": "ATS", "id_locale": "3056023-en", "job_description": "Bachelor's degree in Electrical or Computer Engineering plus: ASIC frontend development Logic design, RTL coding, verification, synthesis, and timing closure Hardware description languages (Verilog, VHDL, System Verilog) Scripting - Perl/Tcl/Python Familiarity of overall SoC Infrastructure - Busses, CPUs, I/Os and DFT Components Familiarity of power islands, power gating, power sequencing and multi-voltage domain design Work with frontend RTL, DFT, Synthesis, and Physical design teams in the development of power intent design at SoC level Generate and validate power intent design (UPF) at SoC level Review designs and guide IP designers' power intent design ensuring it meets SoC level low power implementation requirements Work with design verification in validating low power design featurs at SoC and IP level. Collaborate with company CAD and vendor to enhance existing power flows and tools Improve power design flows in areas of power modeling, clock power analysis, structural power validation, IP power intent QA Execute power-aware implementation flow, including UPF/CPF/Conformal Low Power Check Review IP design's power features and power budgets/estimates Track IP power development through the design cycle ensuring it meets power budgets - leakage/dynamic at every milestone Perform power analysis/projection of SoC baseline power and deliver SoC power models to chipset Execute power simulation/analysis tool (PtPx/PowerArtist)", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446695989699", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695847560, "name": "Infrastructure IP Architect", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "05624 QCT Infra DDR - SD", "t_update": 1701391946, "t_create": 1700179200, "ats_job_id": "3055344", "display_job_id": "3055344", "type": "ATS", "id_locale": "3055344-en", "job_description": "Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. 9+ years of ASIC design, verification, validation, integration, or related work experience. Self-driven, analytical, methodical and process oriented Teamwork approach with excellent oral and written communication Strong understanding of SOC Architecture, preferably ARM based Demonstrated experience with Kernel SW programming, understanding of Windows, Linux/Android, QNX Strong understanding of SW practices related to Memory management, security and Virtualization Experience with debug in pre and/or Post-Silicon environments Experience with data analysis using Excel, Perl, Python etc. Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products. Creates highly advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements. Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs. Evaluates all aspects of highly complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable highly advanced architecture and design of multiple complex blocks/SoC or IC Packages. Writes detailed technical documentation for highly complex EDA/IP/ASIC projects; reviews technical documentation for junior engineers.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446695847560", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446694595304, "name": "SOC Infrastructure IP System Engineer", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "11280 GSoC Auto SD - Infra", "t_update": 1701390886, "t_create": 1694044800, "ats_job_id": "3053323", "display_job_id": "3053323", "type": "ATS", "id_locale": "3053323-en", "job_description": "In your role, you will: Define and drive our next generation of SOC Infrastructure IP from architecture to implementation into a real product. Establish controlled software interfaces in close collaboration with the software team. Be responsible for all technical aspects of the project, dealing with Product Engineers, SOC HW & SW architects, Program managers, Performance, Design, Implementation, Verification and Validation teams. Ensure all PPA (Performance, Power, Area) targets are met Strong knowledge in SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture Strong knowledge in HW-SW interfaces and firmware Strong knowledge in Quality of Service, Clocks, Power management, Security and Debug architectures and their respective software interfaces Experience / knowledge with split multi-die / chiplet architectures Experience with Performance modeling and validation Experience with RTL design and complete design flow Ability to quickly react and adapt to changes. Excellent communication skills. Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. Strong knowledge in SOC infrastructure IP (NOC, Caches, SMMU, Memory Controller) Strong knowledge in HW-SW interfaces, APIs & firmware Experience with industry standards (PCIe, USB, UFS, MIPI, UCIe, ) Experience in Data Science, Machine Learning is a plus Experience in Functional Safety is a plus", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446694595304", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695564349, "name": "SoC Design Engineer", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "05474 QCT Integration - SD", "t_update": 1701391727, "t_create": 1698969600, "ats_job_id": "3054719", "display_job_id": "3054719", "type": "ATS", "id_locale": "3054719-en", "job_description": "Uses tools/applications to execute the architecture, design, and implementation of SOC according to design protocol provided. Resolves architecture, design, or verification problems by applying sound ASIC engineering practices with some supervision. Executes the design and verification strategies of ASICs, SoC, and IP cores of own specific assigned part of a block or IC Package with supervision from project lead. Works on design synthesis, constraints and manual/conformal ECOs for post netlist modifications. Work closely with RTL design, physical design teams to optimize area, performance and power. Identify areas for flow and process improvements Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, integration, implementation or related work experience. Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field.", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446695564349", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695149487, "name": "Memory Designer", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "77762 QCT Graphics SI Memory", "t_update": 1701390674, "t_create": 1695859200, "ats_job_id": "3053689", "display_job_id": "3053689", "type": "ATS", "id_locale": "3053689-en", "job_description": "Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. 5+ years of academic or professional experience designing embedded memories for SoC applications Strong knowledge in CPU L1/L2 cache design, compiler SRAM/Register File architectures and advanced custom circuit implementations Strong knowledge of high-performance and low-power design features & techniques Strong knowledge of semiconductor device fundamentals Familiar with variation-aware design in nanomenter CMOS & FinFet technology nodes Experience with tight pitch-matched memory layout designs Experience with full embedded memory design flow: architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation Good understanding of physical implementation impact on circuit performance As a member of our team, your responsibilities will include (but not limited to): Develop custom digital circuits for high-speed and low-power SRAM designs Schematic capture, simulation of major blocks, margin verifications Layout planning and supervision Interacting with CAD team for full verification and model generation Interacting with SoC teams (CPU, GPU, Modem, etc) to define memory PPA targets", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446695149487", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695896505, "name": "ASIC Design Verification Engineer (San Diego, CA)", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "05616 QCT Infra Power - SD", "t_update": 1701391600, "t_create": 1700524800, "ats_job_id": "3055452", "display_job_id": "3055452", "type": "ATS", "id_locale": "3055452-en", "job_description": "Bachelor's degree in Science, Engineering, or related field. The responsibility of the position involves comprehensive pre-silicon test planning for Power Management Infrastructure IP's, its testbench development using state of the art advanced verification methodology such as SystemVerilog UVM. Develop functional coverage development, SVA assertion model and SystemVerilog UVM based scoreboard for power management IP. Co-ordinate IP and System level use case requirements for verification working with hardware design, architecture, and software teams. Develop comprehensive testplan and perform testplan reviews with all stakeholders. Perform formal verification (property checking), develop formal assumption models and checkers for all power management IP design interfaces. Deploy Power-Aware UPF verification flow and methodology. Develop and deploy hardware simulation acceleration platforms to perform software driver validation and accelerate functional simulation. Develop simulation VIP's and deploy across projects. Develop automation to improve verification efficiency. Opportunity to learn and experience complex bus protocols. Minimum 1 to 5 years of experience in Design Verification domain. New college graduates are welcome to apply. Experience working with RTL languages such as SystemVerilog or Verilog, or VHDL. Preferred experience with IP and/or System Level Testplan development Preferred Experience in block-level and/or System Level testbench environment development Preferred in advance verification methodology such as SystemVerilog UVM or OVM or VMM Preferred experience in functional coverage development, code coverage, functional coverage closure and enable verification signoff. Strong knowledge of computer architecture concepts Strong knowledge of Object-oriented programming concepts including C or C++ programming skills Strong problem solving and debugging skills including RTL design Preferred experience in Formal Verification including developing SVA based Assertions IP and working with Formal Property Checking Tools Preferred knowledge of ARM based bus protocols such as AXI or AHB or ATB Preferred experience in Power Aware Verification including strong understanding of UPF specification Preferred knowledge or experience working with Emulation or Simulation Acceleration hardware platforms to validate software drivers and accelerate functional simulation Preferred experience with scripting and automation tool development using Perl or Python or C Ability to adapt and consume new design features during any phase of verification stage Ability to work in a team environment, manage own tasks on daily basis, meet goals on time, provide periodic project execution updates on week-to-week basis Bachelor's or Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or a closely related field", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446695896505", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695968889, "name": "System Validation Engineer", "location": "San Diego, California, United States of America", "locations": ["San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "20780 Global CPU CPU SVE VI - SD", "t_update": 1701392200, "t_create": 1700611200, "ats_job_id": "3055562", "display_job_id": "3055562", "type": "ATS", "id_locale": "3055562-en", "job_description": "Microprocessors and Multicore, multiprocessor architectures across SMP and heterogenous cores Processor and System/SoC cache architectures and protocols Excellent grasp of DDR DRAM technologies, specifically LPDDR4, LPDDR5 architectures, memory controllers, PHYs, their protocols, programming, validation. Good knowledge of ARM v8, v9 architectures, programming, validation Familiarity with SoC architectures - interconnects, NoCs, power management, DCVS operations, LPM operations Bare-metal programming specifically for stressing DDR, caches, internal SoC interconnects and protocols with intent to find issues with design, silicon settings and other factors influencing design behavior C language expertise for low level programming, Assembly language for any processor, C-assembly interfacing Bare-metal/embedded software development in C/Assembly languages at the hardware-software boundary for post-silicon validation Design and Implementation of drivers and test content Debugging low level software and hardware issues Structured program development concepts, source code management, code reviews, software scrums Good exposure to software development life cycle Some experience with Python Exposure to working on emulation/pre-si environment Familiarity in using debug tools including JTAG and kernel debuggers, protocol analyzers Working in a fast-paced, collaborative, multi-disciplinary environment", "stars": 0.0, "medallionProgram": null, "location_flexibility": null, "work_location_option": null, "canonicalPositionUrl": "https://careers.qualcomm.com/careers/job/446695968889", "isPrivate": false, "latlongs": "32.715738,-117.1610838"}, {"id": 446695403842, "name": "Digital Verification Engineer for Mixed-Signals ASIC (San Diego or Chandler, AZ)", "location": "Chandler, Arizona, United States of America", "locations": ["Chandler, Arizona, United States of America", "San Diego, California, United States of America"], "hot": 0, "department": "ASICS Engineering", "business_unit": "02278 QCT PMIC Digital (US)", "t_update": 1701391057, "t_create": 1698019200, "ats_job_id": "3054317", "display_job_id": "3054317", "type": "ATS", "id_locale": "3054317-en", "job_description": "Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches. Work includes debugging of complex embedded systems including SOCs, firmware, embedded sequencers. Work in a dynamic team environment with aggressive schedule towards metrics-based high quality target. Strong troubleshooting skills across embedded systems disciplines (digital RTL, Firmware, analog behavioral models) Strong communication and organizational skills Strong process improvement mindset. Expert-level System Verilog Programming Advanced UVM/SV (Universal Verification Methodology using System Verilog) Python or Perl scripting Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Pay range: $134,500.00 - $201,500.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). 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